This application claims the priority benefit of Taiwan application serial no. 90111125, filed on May 10, 2001.
1. Field of Invention
The present invention relates to a memory access technique. More particularly, the present invention relates to a method of accessing memory whose memory address is greater than 1 Mbytes in a personal computer system.
2. Description of Related Art
Most conventional personal computer system runs on Intel""s 80xc3x9786 central processing unit (CPU). The 80xc3x9786 type of CPU is capable of operating under two different modes: the real mode and the protected mode.
A conventional computer system having the 80286 CPU has 20 address lines only and hence is able to address a memory space of up to 1 Mbytes. Intel""s 80386 CPU has 32 address lines and hence is capable of addressing a memory space of up to 4 Gbytes. In real mode operation, however, the 80386 CPU has an effective bit width of 20 bits only. FIG. 1 is a schematic diagram showing the steps in a conventional method for accessing the memory space beyond the standard 1 Mbytes. As shown in FIG. 1, if the CPU currently operates under the real mode 100, the CPU needs to be switched into the protected mode 120 before accessing memory 140 at a location greater than the standard 1 Mbytes memory space.
Due to design limitations of a conventional CPU, accessing memory space beyond the 1 Mbytes range is impossible when operating in the real mode. In the past, accessing the memory space beyond the standard 1 Mbytes range required that the system enters the protected mode. However, a task cannot recognize that whether the CPU is currently in the protected mode or not. Therefore, to access memory beyond the 1 Mbytes memory space, the CPU must first be detected before executing associated procedures or steps necessary for bringing the CPU into the protected mode.
According to the aforementioned discussion, the conventional approach suggests a complicated way to access memory greater than or equal to 1 Mbytes because CPU has to enter the protected mode firstly. Furthermore, some tasks may be incapable of detecting the current operating mode of the CPU. Those tasks may bring the CPU into the protected mode again when the CPU is already in the protected mode.
Accordingly, one object of the present invention is to provide a memory access method using system management interrupt so that the memory space of a computer system beyond the standard 1 Mbytes can still be accessed without entering the protected mode.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a computer system using a memory access method that utilizes system management interrupt. The computer system includes at least a CPU. When the CPU receives a system management interrupt signal, the computer system starts operating in the system management mode and the CPU executes a system management interrupt handler routine. The method includes the following steps. First, a software interrupt is arisen for generating a system management interrupt signal. According to the system management interrupt signal, a system management interrupt handler routine is executed to access the data within the memory.
According to the memory access method of this invention, the computer system further includes a chipset. The system management interrupt signal is provided and accessed by a system management interrupt command port of the chipset. The software interrupt service routine and system management interrupt handler routine are provided by the basic input/output system (BIOS).
This invention also provides an alternative memory access method through the system management interrupt. This method includes the following steps. First, a software interrupt is produced if the addressed memory lies beyond 1 Mbytes. A system management interrupt signal is produced during the execution of the software interrupt service routine. Thereafter, the system management interrupt handler routine is executed so that the memory space above the 1 Mbytes can be accessed while the system management interrupt handler routine is running.
This invention also provides a computer system that utilizes system management interrupt to access memory. The computer system comprises a CPU, a chipset and a memory unit. The CPU is coupled to the chipset and the memory unit. When the CPU receives a system management interrupt signal, the computer system turns to operate in a system management mode. The chipset is used to arise the required system management interrupt signal. The computer system uses the aforementioned method to access the data residing in the memory unit addressed beyond 1 Mbytes.
This invention provides a software interface for bringing a CPU into a system management mode and the system management interrupt handler routine is executed. Hence, memory location beyond 1 Mbytes can be easily accessed without disadvantages of conventional approaches.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.